Qiskit-Metal-to-Litho

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On the use of Qiskit Metal coded in Python to generate design files for building quantum devices on a chip, performed via direct-write lithography. Depending on the resolution of desired quantum device features, LASER, scanning thermal probe, and electron-beam techniques are applicable options for patterning your design. - Onri Jay Benally

(Note: in the patterned 400-transmon example below, the ground contacts were excluded from layout as the design was to demonstrate process feasibility from Qiskit Metal design-to-real-chip. However, the main features are clearly visible under optical microscopy. Also, I included a DXF/GDS design output for a full quantum chip , ready for fabrication (electrodes, ground, and all), available to download in the file directories above).

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It Is Important to Know That There Are 2 Main Types of Patterning With the E-Beam Writer (EBPG) Equipment: Description
Marker-based using "rp" commands This is used if your sample has pre-existing markers patterned on it already [ex. sample WITH purposely-designed reference points that can be automatically located by the EBPG]
Marker-free-based using "joyplus" commands This is used if your sample has no pre-existing referencing patterns [ex. bare substrate or other sample WITHOUT purposely-designed reference points]
Terms To Be Aware Of: Description
BEAMER Desktop software for importing GDSII or GDS files stored on WinSCP, beam step, size, and error correction (heal) paramters are set here and subsequently exported as GPF files that can be uploaded to the EBPG equipment.
CJOB Software tool that is accessed on the EBPG equipment itself using the EBPG's terminal. From here, the GPF files can be uploaded and programmed with virtual alignment marker locations based on the design.
Marker The use of reference points on a coordinate plane that are assigned to a pre-existing, detectable pattern on a chip sample. Detection is performed automatically by the lithography equipment.
Marker-free The use of virtual reference points assigned to the region of interest to be patterned on a bare chip sample, wafer substrate, or other sample with without detectable markers.

If You Need to Install pip Through Python, Follow These Steps:
  • First, install an EXE file of Python from: https://www.python.org/downloads
  • Then, install pip by entering the following command into local terminal:
    curl https://bootstrap.pypa.io/get-pip.py -o get-pip.py
  • Now, pip is ready for use!
Installation Steps for Qiskit Metal:
Installing Qiskit Metal Using Git+URL_by Onri Jay Benally
Quantum Chip Rendering Steps:
Qiskit Metal + KLayout + Blender

Required Software (Some Free, Open-Sourced Versions Are Linked Below):
  • Qiskit Metal
  • 2D CAD program
  • Pattern layout viewer & editor (GDS-to-DXF/DXF-to-GDS converter)
  • Electron- & LASER-beam lithography software (GDS-to-GPF converter for equipment)
2D CAD Programs Available: Description
AutoCAD or AutoCAD Web Cost effective alternative to locally-installed AutoCAD
QCAD Open-sourced & simple
LibreCAD Open-sourced & feature-packed
FreeCAD Open-sourced & feature-packed
Salome Open-sourced & feature-packed
Pattern Layout Viewers & Editors: Description
KLayout Open-sourced & feature-packed
LinkCAD Paid version: usually purchased by your lab
Raith_GDSII MATLAB Toolbox Public licensed
Octave/ MATLAB Toolbox for GDSII Public domain
Free or Open-Source Software for Design, Analysis, or Large Data Visualization:
Open Cascade
ParaView
Open-Source Finite Element Method Software (Alternative to Ansys):
ElmerFEM
Open-Source Mesh Generators (To Prepare Design for Use in Finite Element Method Software):
Gmsh
Salome
Open-Source Device Simulation Tools:
Gdsfactory
Electron- & LASER-Beam Lithography Software:
BEAMER (from GenIsys: usually purchased by your lab)
Slides & Webinars for Using Electron-Beam Lithography Software:
GenIsys Webinars
General Overview of Electron-Beam Lithography:
https://nano.yale.edu/book/export/html/213
https://lab.kni.caltech.edu/EBPG_5000%2B:_100_kV_Electron_Beam_Lithography
https://ebeam.mff.uw.edu/ebeamweb/doc/doc/overview.html
https://ebeam.mff.uw.edu/ebeamweb/news/projects/index.html
https://apps.mnc.umn.edu/archive/ebpgwiki/SOP.html
List of Available Process Recipes:
https://lab.kni.caltech.edu/Process_Recipe_Library
https://nano.yale.edu/manuals-documentation
List of Standard Negative/ Positive Tone Resist Materials:
Microresist
EPFL Resist
Open-Source Computational Lithography Tools:
CUDAEBL
Lithography Simulation
Computational Lithography
Examples of Green [Sustainable] Lithography-Based Direct-Write Patterning:
Green Lithography 1
Green Lithography 2
List of Open-Source Process Development Kits & More (Optional):
SiEPIC Ebeam PDK
Skywater 130 PDK
GlobalFoundries 180 PDK
Gdsfactory Library

Some of the Code Used Here are Borrowed or Inspired From the Qiskit Metal Page:
Qiskit-Metal Page

To create the chip below, follow tutorials from the folder called " Python Code_Qiskit Metal_Designs"


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Below is a process flow for a trilayer junction fabrication procedure (trilayer process):

(The SVG script for the trilayer process is available in the Trilayer Junction Process file.)

SiO₂ Bulk Trilayer Seed Layer (BE) Photoresist Step 1: Preparation/ Bulk Device Footprint Lithography SiO₂ Seed Layer (BE) Trilayer (After Etch) Photoresist Step 2: Ion Beam Etch SiO₂ Seed Layer (BE) Trilayer (Exposed) Step 3: Remove Photoresist SiO₂ Seed Layer (BE) Trilayer Photoresist (Pillar/ Vias Defined) Step 4: Pillar/ Via Lithography SiO₂ Seed Layer (BE) Pillar/ Vias (Protected by PR) Step 5: Etch to Form Pillar/ Vias SiO₂ Substrate Seed Layer (BE) Step 6: SiO₂ Deposition SiO₂ Substrate Seed Layer (BE) Top of Pillar/ Vias Exposed Step 7: Lift-Off (Remove PR/ Overlying SiO₂) SiO₂ Substrate Seed Layer (BE) New Photoresist with Openings Step 8: Define Holes in PR for Top Contacts SiO₂ Substrate Seed Layer (BE) Step 9: Ti/Au Metal Deposition SiO₂ BE TE Step 10: Device Ready (After Lift-Off)